1. Field of the Invention
One embodiment of the present invention relates to a field-effect transistor (FET) using semiconductor, in particular, to a power-insulated-gate field-effect transistor (hereinafter, referred to as a power MISFET).
2. Description of the Related Art
A field effect transistor (FET) is a device in which regions called a source and a drain are provided in a semiconductor, each of the regions is connected to an electrode (a source electrode or a drain electrode), and a voltage is applied to the semiconductor via a gate electrode through an insulating film or a Schottky barrier so that the state of the semiconductor is controlled, whereby current flowing between the source electrode and the drain electrode is controlled. As a semiconductor used, a Group 14 element such as silicon or germanium, a compound such as gallium arsenide, indium phosphide, gallium nitride, zinc sulfide, or cadmium telluride, or the like can be used.
In recent years, FETs in which an oxide such as zinc oxide or an indium gallium zinc oxide-based oxide (also referred to as In—Ga—Zn based oxide, IGZO) is used as a semiconductor have been reported (Patent Document 1 and Patent Document 2). FETs using such oxide semiconductor have relatively high mobility, and also materials of oxide semiconductors have a large band gap which is 3 eV or higher.